Optimal Combination of Number of Taps and Coefficient Bit-Width for Low Power FIR Filter Realization

This paper addresses the optimization of FIR filters for low power. We propose a search algorithm to find the combination of the number of taps and coefficient bit-width that leads to the minimum number of total partial sums, and hence to the least power consumption. We show that the minimum number of taps does not necessarily lead to the least power consumption in fully parallel FIR filter architectures. This is particularly true if the reduction of the bit-width of the coefficients is taken into account. We show that power is directly related to the total number of partial sums in the FIR filter, which in turn is determined by the number of bits set to 1 in the coefficients. We have developed a search algorithm that achieves up to 36% less power consumption when compared to an implementation using the minimum number of taps.